Arista EOS: sand hardware-only LAG

CLI: 
platform sand lag hardware-only

目的：

• 一般情况下，1-port LAG是software LAG；
• 如果增加一个port，变成2-port LAG，就会变成hardware LAG，会有traffic interruption，特别是interface flap! 
• 什么意思啊？很简单，如果是2-port LAG，断了一根线，变成1-port/software LAG，有Traffic impact. 如果这根线在Flapping，traffic就一直受影响
• 所以索性一上来就是hw-LAG
• 唯一的影响是，占有的资源(啥资源啊？不知道，LAG table?)会多一些

Arista EOS Hashing Features

Here are some Arista EOS hashing features: 

• 4.15.2F, hashing on ttl and hop-limit
• Trident2-based systems: 7300X, 7050X, 7250QX. All have 2 hash engines, 1 for port-channel, 1 for ECMP
• CLI: 
• port-channel load-balance trident fields ip ttl 
• port-channel load-balance trident fields ipv6 hop-limit
• show port-channel load-balance trident fields
• IP TTL hashing is ON
• Unlike other "port-ch load-balance trident fields" commands, this one applies both to both LAG and ECMP hash engines. 
• Be care of unexpected behavior,  for example,  
• Internet traffic goes to proxy or load-balance servers.
• But somehow traffic going a different path results into different TTL values, like VRRP or MLAG. 
• So if hashing based on ttl, the same traffic stream could end up at different destinations. 
• Hashing egress interface: 
• 4.17.0
• show load-balance destination ingress-interface Ethernet1/1 src-ipv4-address 10.0.0.93 dst-ipv4-address 17.0.0.11 ip-protocol 17 src-l4-port 11001 dst-l4-port 19872
• Output Interface: Port-Channel102
• Disable Ingress interface in hashing
• Arad/Jericho based systems: 7500E/R, 7280E/R
• CLI: 
• no ip load-sharing sand fields ingress-interface
• To avoid polarization, use different preset in different layers:
• ip load-sharing sand has preset <0-2>
• 好像是，不同interface会有不同random#
• 这个for ECMP
• LAG hashing on ingress interface
• 和上面差不多，区别是config放在LB profile里面
• for LAG
• Global LAG hashing profile
• Arad/Jericho, Sand-based systems
• CLI:
• load-balance policies
• load-balance sand profile myProfile
• hash seed 50
• Dynamic and Symmetric LAG Hashing
• From 4-15-0
• Arad/Jericho, Sand-based systems
• Bidirectional flows go thru same member port of LAG
• 做法不难，就是异或源和目标地址，再求哈希，当然LB就是不好
• CLI: 
• load-balance policies
•    load-balance sand profile sym
•    fields symmetric-hash

Arista - traffic disruption during LAG reprogramming

No traffic disruption is expected during LAG reprogramming like adding/removing member ports. There is only one exception - on Sand(Arad/Jericho) platforms, if software Lag is enabled, traffic loss will be seen when # of Lag is changed from 1 to 2,  and vice versa. And software Lag can be disabled by knob - "platform sand lag hardware-only".